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What's New in Cadence Allegro 16.0 Platform,
Next-generation PCB design
Discover how the Cadence® Allegro® platform improves
design efficiency and designer productivity by dramatically shortening the
learning curve in the adoption of new solutions and enhancing ease-of-use.
The Allegro platform is the leading physical and
electrical constraint-driven PCB layout and interconnect system. Now, it has
been updated to include a new methodology for physical and spacing constraints
using the Allegro constraint management system, a common cockpit throughout the
entire design flow. Other updates include support for algorithmic modeling and
package parasitic, improved circuit simulation and statistical analysis,
seamless scalability with OrCAD products, enhanced collaboration, and a new user
interface for improved productivity and usability.
The Allegro 16.0 platform is now supported in Windows
Vista™ Enterprise.
Cadence Allegro PCB Editor
- Usability enhancements within the display canvas and
to the command structure
- Redesigned color/visibility GUI with global and shape
transparency controls
- Improved visibility, additional color support,
smoother panning and zooming
- Enhancements made to the underlying graphics system,
based on OpenGL engine
- Context-sensitive editing paradigm built on selecting
database objects first, followed by command
- Interactive and automatic controls for component
fanout (pin escaping)
- Physical and spacing constraints incorporated in the
Allegro constraint management system
- Mouse wheel support actions supported will be zoom in,
zoom out, and change active subclass of TOP to BOTTOM
- Design Parameter Editor to setup, access, change and
review most often used parameters
- Application modes which automatically selects actions
based on the object selected

Cadence Allegro PCB SI
- Serial link design improvements (BER prediction,
bathtub curve profiles, channel compliance through statistical analysis)
- S-Parameter DC extrapolation improvements
- Support for analytical coupled via model during
topology extraction
- Improvements for post-layout analysis of source
synchronous signals (usability, comprehensive simulation, slew-rate
measurements, de-rating tables)
- Estimated crosstalk table generation enhancements
- Incorporating package and IC parasitics to improve
accuracy without sacrificing performance
- Static IR drop analysis
Advanced constraints in constraint management system
- Advanced constraints for managing advanced I/O
interfaces, such as PCI Express, DDR2, and SATA, using formulas,
user-defined constraints, and custom measurements
- Component workbook in the Allegro constraint
management system
- Custom stimulus integration
Cadence Allegro System Architect GXL
- Accelerated design of differential connectivity(
connectivity, DRCs)
- Enhanced schematic generation (cross-reference
generated schematics, routing preserve, block flattening)
- Pin properties in connectivity pane
Cadence Allegro Design Publisher
- Option of true color or B/W content rich PDF files
- Integrated attribute form to view net and component
attributes
- Optimization for Adobe Reader 8.0
- Ability to view in Design colors, but print in B/W
Cadence Allegro Design Entry HDL
- Improved Design Navigation using Sheet Names
- Controlled deployment using directive locking
- Physical and spacing classes support in Constraint
Manager
- View physical Net names on canvas for plotting.
Documentation
- Cadence Help Online Documentation System replaces
CDSDoc, providing faster invocation time, advanced search capabilities, and
built-in viewing window
Note: The Cadence Allegro 16.0 upgrade will be available
for all current Cadence Allegro customers with active maintenance contracts on
June 15, 2007.
If you want more information please
contact us.
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