09:00 - 09:30 :: Registration

09:30 - 10:15 :: Introduction (Zeeman Room)

                         How Virtuoso 6.1 and Cadence Low Power Solution
                         associatedad kits, will allow you to do design mix-signal
                         SoC with higher productivity and lower risk

10:15 - 11:15 :: 2 techtorials running in parallel

Custom IC design
Virtuoso Custom Design Platform
Zeeman Room

Functional Verification
Incisive Functional Verification Platform
Lorentz Room

What New on
Virtuoso 6.1

Hardware Software Coverification using Incisive ESL
Advance verification methodology using System Verilog
Verifying Low Power Digital Design using Incisive

11:15 - 11:45 :: Coffee break

11:45 - 12:45 :: Continue techtorials

12:45 - 13:45 :: Lunch

13:45 - 14:45 :: 2 techtorials running in parallel

Custom IC design
Virtuoso Custom Design Platform
Zeeman Room

Digital IC Design
Encounter Digital IC

 Design Platform
Lorentz Room

(repeat morning session)

Low Power Digital Implementation and
LP Formal Verification

14:45 - 15:15 :: Coffee break

15:15 - 16:15 :: Continue techtorials

16:15 - 00:00 :: Conclusion and Drinks

CB Distribution BV
www.cb-distribution.nl