Cadence is bringing its technology to its customers and is hosting a series of Technology On Tour days across EMEA during October 2008.

Join us for a free seminar and explore the latest technology and integrated flows - new capabilities that will help you design higher-performance chips and systems, increase productivity, improve your yield, and speed up your time to market.

This year we will have a special focus on Mixed-Signal Design, from Verification to Implementation. We will study methodologies and solutions to efficiently design complex mixed-signal SoCs. Especially ICs with a lot of analog and digital interaction require a seamless "Mixed-Signal On Top" methodology.

Please come and meet us at the following locations:

Lausanne, France October 14th: Ecole Polytechnique Fédérale de Lausanne

Grenoble, France October 15th: MINATEC

Leuven, Belgium October 28th: IMEC Campus

To register for one of the above events please send an email to marketing_euro@cadence.com and indicate your chosen location!

Agenda

09:00 - 09:30	Registration & Coffee
09:30 - 10:00	Industry Keynote (optional)
10:00 - 10:30	Mixed-Signal Design Challenges - Cadence holistic solution
10:30 - 11:00	Mixed-Signal Verification Overview
11:00 - 11:30	Demo: AMS Designer featuring AMS-SpectreTurbo
11:30 - 12:00	Using AMS Designer like a logic verification engineer
12:00 - 12:30	Demo: Command line verification flow
12:30 - 13:30	Lunch
13:30 - 14:00	Implementation overview, presentation of the MSoT concept
14:00 - 14:30	Demo: MSoT - concurrent Analog and Digital design (new CDNLive! demo)
14:30 - 14:50	Mixed-Signal Routing
14:50 - 15:10	Demo: Mixed-Signal Routing (VSR)
15:10 - 15:30	Extraction and timing verification
15:30 - 15:50	Demo: Extraction and timing verification
15:50 - 16:00	Wrap-up and summary