Cadence Design Systems, Inc., today announced an expanded Cadence® Sigrity™ technology portfolio with the Sigrity Parallel Computing 4-pack and the Sigrity System Explorer, an updated power-aware system signal integrity (SI) feature, as well as flexible purchasing options for PCB and IC Package design and analysis. The Sigrity technology portfolio enables product creation efficiency by increasing signoff-level PCB extraction accuracy.
“The Sigrity 2015 portfolio release of implementation-linked analysis solutions targets critical design goals for higher-speed and lower-power electronic products, especially relevant for mobile and Internet of Things markets,” said Vinod Kariat, vice president of R&D, Custom IC and PCB Group at Cadence. “Designers can utilize our new features to enable LPDDR4 sign-off along with simple yet cost-effective licensing for both distributed processing speed-up and multiple tool access by designers with a breadth of application needs.”
- Sigrity Parallel Computing 4-pack is a license that allows designers to run parallel computing tasks across four additional computers, thereby accelerating product creation time and tripling the speed of PCB extraction of signoff-accurate interconnect models.
- Sigrity System Explorer features general purpose topology exploration, enabling poweraware signal integrity and transient power integrity (PI) analysis across multiple fabrics.
Updated Key Feature
- The power-aware system signal integrity (SI) feature now supports LPDDR4 analysis with full JEDEC compliance checking, including bit error rate analysis with high capacity channel simulation for memory interface.
Cadence is also announcing several new product bundles, which provide flexible licensing options for small analysis teams with big analysis requirements. These bundles include:
- Combined license for Allegro® Sigrity SI and Allegro Sigrity PI base products, when a single user is responsible for both SI and PI tasks.
- Combined System SI license for both Serial Link and Parallel Bus analysis, when a single user is responsible for both memory interfaces and SerDes interfaces.
“Our collaboration with Cadence has allowed both engineering teams to develop tools that can improve our joint customers’ product creation process. Working together, Cadence tools support the prototyping stage for our customers and provide a smooth transition to the test and measurement stage of product development,” said Brian Reich, VP Performance Oscilloscopes, Tektronix. “For example, in mobile memory, the Sigrity solution efficiently enables LPDDR4 designs through the prototype stage; while we provide our oscilloscope-based solution for electrical validation. Together, we help our joint customers accelerate their time-to-market.”
To learn more about Sigrity solutions, click here.