Cadence Sigrity technologists guide you step by step on how to use the Sigrity Finite Difference Time Domain (FDTD) simulator to accurately predict the impact of simultaneous switching noise (SSN) in a system context.

A PCB layout is directly connected to a system topology without having to perform an S-parameter extraction. This “FDTD-direct” methodology overcomes the challenge faced by SI engineers who fear accuracy could be compromised when converting an S-parameter to a simplified broadband spice model.

Allegro Sigrity SI Base and Power-Aware SI Option from Cadence are demonstrated in the following video.