PCB Layout Techniques for High Power Applications

High-power boards can fail in ways that are hard to predict and expensive to fix. In many cases, the root cause can be traced to a layout decision that failed to account for the actual current path.

The consequencs of that oversight can include thermal runaway, insulation breakdown, and interconnect failure. At 150V and 600A, there is very little margin for layout decisions that are merely good enough.

Join us for a practical, design-focused session with PCB expert, Mario Strano where you will walk away knowing how to:

• Identify critical current paths and hidden bottlenecks.
• Reduce voltage drop and heating through effective conductor design.
• Apply high-voltage creepage and clearance best practices.
• Locate and mitigate common thermal hot spots.
• Improve reliability through placement and interconnect design.

Unable to attend live? Register anyway and we will send you the recording so you can watch it at your convenience.
Clicking the link will redirect you to Cadence’s registration page