
September 16, 2025
Reduce SMT Parasitic Design Failures with Innovative Filter Topologies
Time: 20:00
Duration: 1 hour
Unlock the Keys to Better SMT Filter Designs
Join our webinar to explore the challenges and optimization strategies for designing reliable filters using SMT capacitors and inductors. Discover how spurious responses, parasitic behaviors, and PCB layout can impact your designs—and learn how to overcome these challenges with powerful tools like Cadence’s Microwave Office software and Modelithics simulation models
You will learn about:
- How innovative SMT filter topologies can manage spurious performances.
- The role of PCB layout in influencing parasitic behaviors and SMT component values
- Strategies to enhance design performance with Cadence and Modelithics tools.
Why Attend?
Gain insights to ensure your designs are accurate and avoid costly product delays or failures.
Unable to attend live? Register anyway and we will send you the recording so you can watch it at your convenience.
Clicking the link will redirect you to Cadence’s registration page